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                                                             MS911 OSD circuit description: MS911 is OSD circuit with a MCU can be controlled in different types of display systems. Dot matrix display is 12 × 18, built-in part numbers, English characters, Japanese characters and Chinese characters. Integrated circuits on reset circuit is cleared and a VRAM circuit for reducing the workload of the MCU, while the built-in phase comparator and frequency multiplier circuit 4, the system can effectively reduce the area of ​​the peripheral circuit board cost. Main characters: * Input signal: mixed video signal; * Display the number of characters: 12 lines, 24 columns; * Built-in characters: 128 (ROM); * Character display size: 1 times (default mode), 2 times; display color: white (only one); * character dot matrix: 12 × 18; * Show background: 4 modes (Nobackground, black framing, black-on-white, black filling); * background color: black, white, Blue, green * display flashing: You can set the selection to turn on or off the blinking function, there are three kinds of flashing frequency: 0.5HZ, 1HZ, 2HZ; * Video signal system: NTSC / PAL / PAL-M / SECAM / PAL- Communication interface: 8-bit serial interface; * supply voltage: 5V; pin diagram Hangzhou Rui UNITA Technology Co., version: 1.0 2010.01.25 Http: www.relmon.com Page 1 of 18
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                                                              MS911 Pin Definitions: Pin No. Pin Name Description 1 SECAM SECAM Input 2 VCNT Video Signal Output Amplitude and Brightness Signal Control (2.5V or 5V) 3 VEDIOIN Mixed Video Signal Input, consisting of negative sync signal and a positive video signal 4 CLKIN communication interface clock input; data input from DATAIN on clock rising edge 5 CSIN communication interface chip select signal input; active low level 6 DATAIN communication interface data input; synchronous input by CLKIN signal 7 VDD supply - power supply 8 OSCO LC oscillation frequency input and output pins, the external coil and capacitor 9 OSCI 10 rESET reset pin; for initializing an internal circuit, connected to high level after power supply 11 GND - ground 12 FOSCI FSC signal input; for 4 times the frequency mode, when using 4FSC crystal when the power supply or ground 13 FOSCO frequency error output; 4 frequency mode error signal from the output, when using 4FSC crystal when floating 14 XOSCO 4 times the frequency input Output (for synchronous signal generation or separation), external LC oscillator 15 XOS oscillator or crystal oscillator 16 VC character signal output pin, positive signal output 17 VBLK frame signal output (cut off the character signal), and VC pin Output corresponding to positive signal output 18 HSOUT line sync signal output (mixed sync signal isolated or self generated) 19 VSOUT field sync signal output (mixed sync signal isolated or self generated) 20 CSYIN mixed sync signal input, external When the mode is used for synchronous signal separation, input positive signal 21 TEST2 is empty, can be floating 22 TEST1 test pin, when used to ground 23 NOISER noise suppression (external capacitor to ground) 24 VEDIOOUT composite video signal output, mixed with the character signal Hangzhou UNITA Technology Co., Ltd. Version: 1.0 2010.01.25 Http: www.relmon.com Total 18 Page 2
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                                                              MS911 Limit Parameter Parameter Item Name IA911 Unit Supply Voltage VDD 7 V Input Pin Voltage VIN -0.3-VDD + 0.3 V Output Pin Voltage VOUT -0.3-VDD + 0.3 V Operating Temperature TA -20 to +75 C Storage Temperature Tstg • 40 to +125 C Operating current Ic 5 mA Recommended electrical parameters Parameter Symbol Conditions Min Typ Max Unit Operating voltage VDD 4.5 - 5.5 V LC Oscillation frequency Fosc 4 7 8 MHz Control terminal high level VOH DATAIN, CLKIN, CSIN, RESET 3.5 - - V input voltage control Low Voltage VOL DATAIN, CLKIN, CSIN, RESET - - 1.5 V Input Voltage Internal Signal Set VVL VCNT 2.5 - VDD V Level External Video Signal VI VEDIOIN 0 - VDD V Input Voltage Operating Current IDD Fosc = 8M - 20 mA High Level Output Power VSOH VDD = 5.0V, ISOH = -1mA 4.5 - V Low Level Output Power VSOL VDD = 5.0V, ISOL = 1mA - - 0.5 V Pressure Crystal Oscillation Frequency 1 FXON1 NTSC 14.31818 Crystal Oscillation Frequency 2 FXON2 PAL, SECAM 17.734475 MHz Crystal Oscillation Frequency 3 FXON3 PAL-M 14.302446 Crystal Oscillation Frequency 4 FXON4 PAL-N 14.328225 Hangzhou Rui UNITA Technology Co., Ltd. Version: 1.0 2010.01.25 Http: www.relmon.com Total 18 Page 3
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                                                              MS911 instruction: 1. Command mode control instruction using variable 8-bit data unit through the serial form of transmission; There are three modes can be used: 1-byte mode, composed of 8-bit instruction and data; 2-byte mode by 16 Instruction and data composition; 2-byte contiguous mode, continuous transmission of instructions and data. The data transfer starts at the high level. 2. Instruction list 1-byte mode instruction D7 D6 D5 D4 D3 D2 D1 D0 VRAM clear 0 0 0 0 0 0 0 0 Display control 0 0 0 1 D0 LC BL1 BL0 Internal mode Background color control 0 0 1 0 RGB 0 background Control 0 0 1 1 0 BS1 BS0 0 Internal and external mode selection, clock control 0 1 0 0 0 E / I 0 XOSC Video signal mode selection 0 1 0 0 1 N / P2 N / P1 N / P0 Oscillation mode selection 0 1 0 1 0 0 XFC 0 2-byte mode D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 L1 1 0 0 0 0 0 V4 V3 V2 V1 V0 H4 H3 H2 H1 H0 L2 1 0 0 0 1 0 0 AR3 AR2 AR1 AR0 AC4 AC3 AC2 AC1 AC0 L 3 1 0 0 1 0 0 0 VPD 0 0 0 0 0 1 VC1 VC0 L4 1 0 0 1 1 0 0 0 0 S0 0 0 AR3 AR2 AR1 AR0 L5 1 0 1 1 0 0 0 0 T7 T6 T5 T4 T3 T2 T1 L0: character size control; L5: test mode; 2-byte contiguous mode D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 L0: character position control; L2: write address control; L3: output level control; D1 D0 L8 1 1 0 0 0 0 BL 0 0 C6 C5 C4 C3 C2 C1 C0 L8: Display character control; 3. Power-on reset circuit Since the circuit is powered on when the internal register and other states are uncertain, so the pin is used in the circuit The initial value of the internal register and the clear value of the VRAM are cleared at power-up: * The test mode is cleared. * All VRAM is set to display off data (7EH) and flashing data is set to off * VRAM write address is set to (0,0) * The character size of all lines is set to 1 (minimum size) Hangzhou Rui UNITA Technology Co., Ltd. Version: 1.0 2010.01.25 Http: www.relmon.com Total 18 Page 4
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                                                              MS911 * display is set to off, LC oscillation on Power-on reset time can be calculated by: t = tpcll + {VRAM clear time} = 10 (us) + {10 (us) + 12 / fosc (MHZ ) × 288 (us)} 4. Register setting and description 4.1, VRAM clear instruction: D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 Description: After VRAM clear instruction is executed, the internal circuit is set as follows: * The test mode is cleared. * All VRAMs are set to show off data (7EH) while flashing data is set to off * VRAM write address is set to (0,0) * All line character sizes are set to 1 (minimum size) * Display (RS) × 288 (us) 4.2, the display control instruction D7 D6 is set to OFF, the time required for LC oscillation to turn on VRAM can be calculated by: t = VRAM clear time = 10 (us) + 12 / fosc (MHZ) D5 D4 D3 D2 D1 D0 0 0 0 1 D0 LC BL1 BL0 Blinking control bit BL1 BL0 Description 0 0 Blinking Off 0 1 Flashing frequency: approx. 2HZ 1 0 Flashing frequency: about 1HZ 1 1 Flashing frequency: approx. 0.5HZ Description: Blinking control bit character flashes on or off Specified by the display character control instructions; flashing ratio of 1: 1, there are three kinds of flicker ratio can be selected. LC Oscillation Control bit LC Description 0 LC Oscillation Off 1 LC Oscillation On Description: LC Oscillation Control bit This bit of data can control the LC oscillation on or off, turn off LC oscillation to reduce power consumption when no character is displayed; when LC oscillation is off , You can not write data to VRAM. When you need to write data to VRAM, make sure LC oscillation is on. Hangzhou Rui UNITA Technology Co., Ltd. Version: 1.0 2010.01.25 Http: www.relmon.com Total 18 Page 5
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                                                              MS911 Display Control Bit D0 Description 0 Display Off 1 Display On 4.3, Internal Mode Video Signal Color Control Instructions This command is used for video mode control in internal mode. RGB 0 Internal mode Video signal Color control bit RGB Description 0 0 0 Black 0 0 1 Blue 0 1 0 Green 0 1 1 Setting disabled 1 0 0 Setting disabled 1 0 1 Setting Prohibited 1 1 0 Setting prohibited 1 1 1 White Description: These control bits can be selected from 4 colors as internal video signals. 4.4, Background Control Instructions This command is used to select the character display background. D7 D6 D5 D4 D3 D2
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                                                              MS911 0 1 0 0 0 E / I 0 Xosc Crystal Control Bit Xosc Description 0 Crystal Off 1 Crystal Oscillation Description: This bit controls the crystal oscillator on or off, this crystal is used for external mode when the mixed sync signal is separated and internal Mode when the synchronization signal is generated; when the crystal is turned off, the mixed sync signal separation will not work, so be sure to turn on the crystal. Internal and external mode selection bit E / I Description 0 External video signal mode 1 Internal video signal mode Description: The MS911 has two operating modes: external operating mode and internal operating mode, and built-in mixed sync signal separation circuit and synchronous signal generating circuit; when MS911 When the circuit is used in external mode, the external sync signal is input, separated for field and field synchronization, and the VBSI pin input external video signal is superimposed by the switch after the character signal is output from the VBSO pin. When the MS911 circuit is used for the internal mode , The internal sync signal is generated, while the VBSI pin pin turns off the input and the character signal is output from the VBSO pin. 4.6, the video signal mode selection command MS911 can choose NTSC, PAL, PAL-M, PAL-N standard; in the internal mode, when selected for the SECAM standard, the internal video signal to PAL system output. N / P2 N / P0 N / P0 N / P0 N / P0 N / P0 N / P0 N / P0 N / P0 N / P0 N / P0 N / PAL-M Standard 0 1 1 SECAM 1 0 0 PAL-N Setting prohibited Description: In internal mode, these control bits are used to generate video signals in different formats. 4.7, oscillation mode selection command D7 D6 D5 D4 D3 D2 D1 D0 0 1 0 1 0 0 Xfc 0 Oscillation mode selection Hangzhou Rui UNITA Technology Co., Ltd. Version: 1.0 2010.01.25 Http: www.relmon.com Total 18 Page 7 Page
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                                                              MS411 Xfc Description 0 Quadruple oscillation 1 4fsc oscillation oscillation Description: Quadruple oscillation mode: Fsc is input from the FSCI pin, amplified and compared with the XOSI4 divided signal. The phase difference signal is output from the FSCO, the external oscillator is used to adjust the XOSI oscillation frequency, the XOSI frequency Equal to 4FSC; 4fsccrystaloscillation mode: XOSI pin then 4Fsc frequency crystal, FSCI pin and FSCO pin floating. 4.8, display position control instruction This instruction is used to set the display start bit. Because it is 2-byte transmission mode, make sure that 16-bit data transfer is complete D15 D14 D13 D12 D11 D10 D9 D8 D7 D5 D4 D3 D2 D1 D0 1 0 0 0 0 0 V4 V3 V2 V1 V0 H4 H3 H2 H1 H0 Horizontal display start position control bit H4 H3 H2 H1 H0 Function 0 0 0 0 0 Form rising of HS (12 * 1) / fosc + 4 / fosc (us) 0 0 0 0 1 Form rising of HS (12 * 2) / fosc + 4 / fosc (us) ....................................................................................... ... 1 1 1 1 1 Form rising of HS (12 * 32) / fosc + 4 / fosc (us) Vertical display start position control bit V4 V3 V2 V1 V0 Function 0 0 0 0 0 Form rising of VS 9H * 0 0 0 0 0 1 Form rising of VS 9H * 1 ... ................................................................................. 1 1 1 1 1 Form rising of VS 9H * 31 Description: Line display start position control bit: line display The start position control bit can be set to 12 steps in units of 1 to 32 steps, 16 lines of synchronous signal after the rising edge of the start; field display start position control bit: field display start position control bit can be set to 9 line units of 1 to 32 steps , Starting from the rising edge of the field synchronization signal; Hangzhou Rui UNITA Technology Co., Ltd. Version: 1.0 2010.01.25 Http: www.relmon.com Total 18 Page 8
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                                                              MS911 4.9, Write Address Control Instructions This instruction specifies the position of the address of the displayed character in the VRAM (12 rows and 24 columns) D15 D14 D13 D12 D11 D10 D9 D8 D7 D5 D4 D3 D2 D1 D0 1 0 0 0 1 0 0 AR3 AR2 AR1 AR0 AC4 AC3 AC2 AC1 AC0 Write column address control bits AC4 AC3 AC2 AC1 AC0 Function 0 0 0 0 0 Sets column 0 0 0 0 0 1 Sets column 1 ............................................. ............................................. 1 0 1 1 1 Sets column 23 Write line address control bits AR3 AR2 AR1 AR0 Function 0 0 0 0 Sets line 0 0 0 0 1 Sets line 1 ......... ........................................................................ ... 1 0 1 1 Sets line 11 4.10, output level control instruction D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 1 0 0 1 0 0 0 VPD 0 0 0 0 0 1 VC1 VC0 Hangzhou Rui Union Technology Limited
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                                                             MS911 Character Level Amplitude Control Bit VC1 VC0 Description 0 0 Setting Disable 0 1 75 IRE 1 0 Setting Disable 1 1 90 IRE Internal Video Signal Amplitude Control Bit VPD Description 0 1 Vp_p amplitude 1 2 Vp_p amplitude Description: Character Brightness Control Bit: These Note: The background brightness is 0 IRE Internal video signal amplitude control bit: When VPD is set to 0, when set to 1 Vp_p, the VCNT tube is set to 0, when the VPD is set to 0, When the VPD is set to 1, that is set to 2 Vp_p, VCNT pin then 5.0V; 4.11, character size control instructions This command can be Set a line size to be doubled D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 1 0 0 1 1 0 0 0 0 S0 0 0 AR3 AR2 AR1 AR0 Line selection control bit AR3 AR2 AR1 AR0 Description 0 0 0 0 0 set for the first row 0001 of the first row is set to 101 .......................................................................................... 1 dot = 1us / fosc (MHZ) fosc (f) () () () () () () () () () () () () () () () () () () () () : LC oscillation frequency example: Rui UNITA Technology Co., Ltd. Hangzhou version : 1.0 2010.01.25 Http: www.relmon.com Page 10 of 19
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                                                              MS911 4.12, Test mode command D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 1 0 1 1 0 0 0 0 T7 T6 T5 T4 T3 T2 T1 T0 Description: This instruction is used for IC test and The test bit is set to all zeros: D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 4.13, display character control instruction using 2_bytecontiguous transfer mode, This instruction is used to write the character address and the flicker control bit to be displayed to the Video RAM (VRAM). D0 D14 D13 D10 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 1 1 0 0 0 0 BL 0 0 C6 C5 C4 C3 C2 C1 C0 Flashing control bit BL Description 0 Character does not blink 1 character flashing Character specification bits 0 C6 C5 C4 C3 C2 C1 C0 Function 0 0 0 0 0 0 0 0 Output data of OOH 0 0 0 0 0 0 0 1 Output data of O1H ........................................................... ........................ Hangzhou Rui UNITA Technology Co., Ltd. Version: 1.0 2010.01.25 Http: www.relmon.com Total 18 Page 11
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                                                              MS911 0 1 1 1 1 1 1 0 Output data of 7EH (DISPLAY OFF) 0 1 1 1 1 1 1 1 Output dataof 7FH (2_bytecontiguous transmission mode end) 5. Serial transmission There are three modes of serial transmission, Byte mode, 2-byte mode, 2-byte Contiguous mode. 5.1, 1-byte transmission mode 5.2, 2-byte transmission mode using 2-byte mode transmission, in the first byte and the second byte to maintain a low level of transmission. 5.3, 2-byte Contiguous transfer mode 2-byte Contiguous mode is used to write VRAM. When the flashing data is not rewritten, 1stbyte writes to 2ndbyte and remains low. 5.4, ​​Continuous Transfer Mode Input When writing to VRAM, the flashing data may need to be changed, so the 1-byte, 2-byte and 2-bytecontiguous modes need to be used interchangeably. Hangzhou Rui UNITA Technology Co., Ltd. Version: 1.0 2010.01.25 Http: www.relmon.com Total 18 Page 12
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                                                              MS911 alternate transmission mode when 1-byte, 2-byte and 2-byte contiguous mode, data from the microcomputer to the circuit as follows. 5.4.1 When the 2-byte contiguous mode end detection bits are not used Example: 1-byte mode --2-byte contiguous mode --1-byte mode NOTE: 00H7EH 5.4.2, when a 2-byte Contiguous mode end detection bit when used Example: 1-byte mode - 2-byte contiguous mode - 1-byte mode NOTE1: 00H 7EH NOTE2: 7FH 5.5, transmission input BUSY cycle using 1-byte, 2- Byte and 2-bytecontiguous mode will have a BUSY cycle, respectively, the following two cases were described 5.5.1, when using 1-byte, 2-byte mode, enter the name of the conditions of the minimum value of the maximum value of Hangzhou Rui UNITA limited technology company version: 1.0 2010.01.25 Http: www.relmon.com total of 18 page 13
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                                                              MS911 TB1 1-byte or 2-byte mode 2.0 us 5.5.2 When using 2-byte contiguous mode input (1) Using 2-byte contiguous mode When field sync signal period field synchronization signal is detected Name Condition Min. (21 / fosc) × S1 Fosc: LC oscillation frequency S1: character size Thwl1: line sync signal width TB1 : greater than or equal to the following: TB1  + (21 / fosc) × S1 + Thwl1 us mode display off TB1  + Is equal to 2.0us (2) using 2-byte contiguous mode in the field synchronization signal cycle, but does not detect the case of field synchronization signal name condition minimum value typical value maximum unit TB2 2-byte contiguous (21 / fosc) × S2 + Thwl2 us mode, Display on Fosc: LC oscillation frequency S2: first line character Inch Thwl2: horizontal synchronization signal cycle Hangzhou Rui UNITA Technology Co., version: 1.0 2010.01.25 Http: www.relmon.com total of 18 Page 14
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                                                              MS911 6. character table and address of Hangzhou Rui UNITA Technology Co., version: 1.0 2010.01.25 Http: www.relmon.com total of 18 Page 15
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                                                              MS911 Hangzhou Rui UNITA Technology Co., version: 1.0 2010.01.25 Http: www.relmon.com total of 18 Page 16
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                                                              MS911 NOTE1: Display Off NOTE2: 2-byte contiguous Mode End Mark Bit 9. Typical Application Diagram Hangzhou Rui Meng Technology Co., Ltd. Version: 1.0 2010.01.25 Http: www.relmon.com Total 18 Page 17
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                                                              MS911 Hangzhou Rui UNITA Technology Co., Ltd. Version: 1.0 2010.01.25 18 18 Http: www.relmon.com Page