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Single-Board Universal Module
- midelic
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- moss
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SKY says: "The CMOS decoder should have VDD applied before a logic high is
applied to one of the control lines."
...besides the sequencing requirement. Dump that part.
The PE part states:
"Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS® devices are immune to latch-up."
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- PhracturedBlue
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The datasheet shows a 1M-ohm resistor to VCC and a bypass cap (I think 100pf would be fine here). I think the resistor is just to ensure that the control signals don't float (which they never will in our design), so I should be able to get away without the resistors, right? I really need to keep the component count down as space is really at a premium.
I would definitely prefer to use a 4:1 mux, and the layout changes look minimal for the PE 4:1. Also I can source them from China and Digikey which is nice (I like having multiple suppliers).
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- hexfet
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- moss
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I'm not using pull-ups at all. I think this is just for the demo board to not malfunction with CMOS inputs.
You can get them from DigiKey or RFMW in the US.
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- PhracturedBlue
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- octagon
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Do you need a foot print for the PE part?
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- PhracturedBlue
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OshPark is ~$25 for 3 boards including shipping
More importantly ,we designed to the OshPark design rules, which means the boards are likely to actually work
And the footprint for the PE part is the same as the Sky13384 though the pin-out is different
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- octagon
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OshPark seems good. I ordered boards from seeed that actually worked. The RF explorer is made by seeed, plus many other well known parts, so I'm not worried about them. They also have some eagle rules that you can use if you want. I'm not a fan of tented vias so I did not.
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- mikemacwillie
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I did a little more digging with the current switch.. I too was concerned that it could be a latch-up problem due to the lack of pull-down resistors on the control lines and the required power-up sequence, but there aren't any measurable power-up transients on the control lines, and adding the pull-down resistors for good measure had no effect.
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- PhracturedBlue
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Also the PE42641 docs are unclear.
Initially it says: 'No DC blocking capacitors are required'
Then later it says 'Blocking capacitors needed only when non-zero DC voltage present' (which seems to indicate DC blocking caps ARE needed)
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- octagon
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Blocking caps are built in, but have low breakdown voltage, so if you plan to apply DC to a port, add a cap. Adding a resistive load is OK for this part, but harmful for the SKY part, as it would load down the internal circuit.
An 8pF (murata GRM1555C1H8R0DZ01) would have a loss of 0.04dB at 2.44GHz. The same part would have a self-resonance at 2.56GHz thus be good at killing the signal as a bypass cap.
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- mikemacwillie
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- octagon
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The effect of some difference in impedance may not be that much, as these lines are not used for tuning, and are very short.
www.awrcorp.com/products/optional-produc...sion-line-calculator
100pF or 8pF should make no difference here, 100pF would be better at the low frequencies you don't need.
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- PhracturedBlue
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EDIT: replaced with newer version, see below
The schematics/board can be found here:
bitbucket.org/deviationtx/universaltx
It is basically identical to the 0.9 board, but I fixed the LDO, added some probe points, added caps to the muxsel control lines, and swapped the 4:1 switch. I also removed the blocking cap between the switch and the amp, but I'm not sure that is a good idea.
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- octagon
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Adding a coupling cap wont hurt, but as I remember the RFX2401 does not produce DC on pin 4 (?).
Why not pour ground over the whole board? Using OshPark's stack-up you can calculate line width and isolation with TX-line with CPW-ground. (9 mil isolation layer 1 -2?). Use the "isolate" number in the polygon setting to adjust for the CPW-ground result.
Like with a 9 mil dielectric e=4.4, 10mil gaps, and 15 mil line-width. Pins on IC's can start at 9 mil and change to 15 a bit away from the pins.
Use layer 41 "tRestrict" polygons to keep ground from pouring where you don't want it.
Keep a complete unmasked area under the chip slug, control the amount of solder paste by disallowing "cream" on SMDs, and draw you own "cream" layer on pads.
(default cream is typically too much)/
Use layer 41 "tRestrict" polygons to keep ground from pouring where you don't want it.
More ground vias can't hurt.
The two big mounting holes can be vias and assigned to VSS for making large low inductance ground vias. Some vendors charge more for un-plated holes are this is an extra process step.
The USB pads should be grounded and given vias to strengthen them. I've pulled off a few of these. For occasional programming use it may be OK.
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- PhracturedBlue
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I've connected the USB pads to ground, that should help some. adding vias to the pads isn't feasible due to the LDO on the bottom (which I have no place to move to)
I don't pour ground because I don't like the way it fills on the top of the board. Maybe if I play with it more, I can get something I like.
I thought 'd calculated 9mil as ok for the width, but using txline with Oshpark's stackup, I get about 13mil:
FR408 = 3.6 dielectric constant
1.4mil copper
6.7mil prepreg
support.oshpark.com/support/articles/122...p-and-specifications
Using vias rather than mounting holes is a good idea, I'll give that a shot too.
Adding more vias overall is always a good idea, there isn't too much room unless I fill the RF section though.
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- octagon
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- Posts: 58
Via inductance can be a problem, like in series with bypass caps where it would make bypassing less effective.
Using larger drills if possible is preferable. Minimize the use of 13 mil drills to where it only possible.
I'd rather have those inductances in parallel on poured ground than isolated.
www.saturnpcb.com/pcb_toolkit.htm
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- PhracturedBlue
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Here is the updated design:
oshpark.com/shared_projects/H6IjHydR
I've also checked the updates into bitbucket:
bitbucket.org/deviationtx/universaltx
I ended up not replacing the mounting holes with vias. I don't need to with OshPark and would rather not change anything I don't need to.
We've already created custom cream layers and I had no issue applying it with a stencil, so I'm not going to worry about that either.
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- octagon
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- Posts: 58
Cutting out ground from around the PE switch serves no purpose, and is not done in their model layout. Keep the ground solid around it.
Adding line and via inductance to the output highpass filters capacitors ground leads alters the filters response, did you run an RF simulation with these added?
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